2022 China New Design 10g Sfp+ To Rj45 - 10GBASE-LR SFP+1310nm 10km Hi-Optel HSFP10-2323 module – Hi-optel

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2022 China New Design 10g Sfp+ To Rj45 - 10GBASE-LR SFP+1310nm 10km Hi-Optel HSFP10-2323 module – Hi-optel Detail:

Descriptions

The transceiver consists of two sections: The high performance a 1310nm DFB Laser, Transmitter and high sensitivity PIN integrated with a TIA. Receiver.

A block diagram of the HSFP10-2323 SFP+ optical transceiver is shown below.

233

The module is hot pluggable into the 20-pin connector. The high-speed electrical interface is based on low voltage logic, with nominal 100 Ohms differential impedance and AC coupled in the module. The optical output can be disabled by LVTTL logic high-level input of TX_Disable. Loss of signal (RX_LOS) output is provided to indicate the loss of an input optical signal of receiver. The receiver RATE_SELECT pin is not used by the transceiver.

A 2-wire interface (SCL, SDA) is used for serial ID, digital diagnostics and other control /monitor functions.

● Absolute Maximum Ratings

Parameter	Symbol	Min	Max	Unit
Storage Temperature	T_ST	-40	+85	℃
Supply Voltage	V_CC3	0.0	+3.6	V
Relative Humidity	RH	5	95	%

● Recommend Operation Environment

Parameter	Symbol	Min	Typ	Max	Unit
Date Rate			10.3125	11.3	Gb/s
Supply Voltage	V_CC	+3.14	3.3	+3.47	V
Supply Current	I_CC			300	mA
Power Dissipation	PD		800	1000	mW
Operating Temperature	T_OP	-40	25	+85	℃

● Optical Characteristics (Condition: T_a=T_OP)

Parameter	Symbol	Min	Type	Max	Unit	Note
Transmitter
Date Rate			10.3125	11.3	Gb/s
Optical Wavelength	λ	1260		1355	nm
Average output power	Po	-6.5		0.5	dBm		1
Optical Extinction Ratio	ER	3.5			dB		1
Optical Modulation Amplitude	OMA	-5.2			dBm
Disabled Power	Poff			-30	dBm
Side Mode Suppression Ratio	SMSR	30			dB
Dispersion penalty				3.2	dB
Tx Jitter	Txj	Per 802.3ae requirements
Receiver
Date Rate			10.3125	11.3	Gb/s
Optical Wavelength	λ	1260		1355	nm
Receiver Sensitivity	R			-14.4	dBm		2
Receiver Sensitivity in OMA	R			-12.6
Stressed Receiver Sensitivity in OMA	R			-10.3	dBm		2
Maximum Input Power	PMAX	0.5			dBm
LOS De-Assert	LOSD			-15	dBm
LOS Assert	LOSA	-25			dBm
LOS Hysteresis		0.5		4	dB
Receiver Reflectance				-12	dB

Notes
Note 1. Measured at 10.3125b/s with PRBS 2³¹ – 1 NRZ test pattern.
Note 2. Under the ER worst case, measured at 10.3125 Gb/s with PRBS 2³¹ – 1 NRZ test pattern for BER< 1×10^-12

● Electrical Characteristics (Condition: Ta=TOP)

Parameter			Symbol	Min	Typ	Max	Unit	Note
Transmitter
Differential input voltage swing			VI	150		1600	mVpp	1
Common mode voltage tolerance				15	-	-	mV
Transmit Disable Input		H	V_IH	2.0		Vcc+0.3	V
Transmit Disable Input		L	V_IL	0		0.8	V
Transmit Enable Output		H	V_OH	2.4		Vcc+0.3	V
Transmit Enable Output		L	V_OL	0		0.4	V	2
Data Dependent Input Jitter			DDJ			0.1	UI
Data Input Total Jitter			TJ			0.28	UI
Input Differential Impedance			Zin	80	100	120	Ω
Receiver
Differential output voltage swing				500		700	mVpp	3
LOS Output	H		V_OH	2.4		Vcc+0.3	V	2
LOS Output	L		V_OL	0		0.4	V
Rx Output Rise and Fall Time			Tr/Tf	30			ps	20% to 80%
Total Jitter			TJ			0.7	UI
Deterministic Jitter			DJ			0.42	UI
Output Differential Impedance			Zon	80	100	120	Ω

Note 1. TD+/- are internally AC coupled with 100Ω differential termination inside the module.
Note 2. Tx Fault and Rx LOS are open collector outputs, which should be pulled up with 4.7k to 10kΩ resistors on the host board. Pull up voltage between 2.0V and Vcc+0.3V.
Note 3. RD+/- outputs are internally AC coupled, and should be terminated with 100Ω (differential) at the user SERDES.

Pin Assignment

Diagram of Host Board Connector Block Pin Numbers and Name

Pin Assignment

Product detail pictures:

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